Semiconductor Engineering

Fast-Track Your Early SoC Design Exploration And Verification

Most advanced node system-on-chip (SoC) designs are very large, and very complex. They typically contain many blocks and intellectual property (IP) that perform specialized functions, such as ...
Electronic Design

Optimize SoC Design with a Network-on-Chip Strategy

How third-party interconnect IP saves time, lowers risk, and speeds completion. NoC is the predominant SoC interconnect strategy. NoC IP accommodates multiple interconnect protocols and data widths.
Electronic Design

Physically Aware Network-on-Chip Streamlines SoC Design Cycle

This video is part of TechXchange Talks. Arteris IP has released FlexNoC 5, a network-on-chip (NoC) IP configuration tool, designed to improve system-on-chip (SoC) designs and streamline the design ...
EDN

Create high-performance SoCs using network-on-chip IP

A system-on-chip (SoC) containing a million transistors was considered a large device in the not-so-distant past. Today, SoCs commonly contain up to a billion transistors. Consider, for example, the ...
EDN

SoC design: What’s next for NoCs?

Today’s high-end system-on-chips (SoCs) rely heavily on sophisticated network-on-chip (NoC) technology to achieve performance and scalability. As the demands of artificial intelligence (AI), ...
Semiconductor Engineering

Securing IP Integrity In Advanced SoC Design

In today’s complex system-on-chip (SoC) design flows, intellectual property (IP) blocks are everywhere—licensed from third parties, leveraged from internal libraries, or hand-crafted by expert teams.